Ka-Ro QS Module Selection & Cross-Compatibility Guide

QS Module Selection Guide — the printable version: Download PDF
Ka‑Ro QS Series · Computer on Module

QS Module
Selection & Cross-Compatibility
Guide

A designer's reference to the Ka-Ro QS family of QFN-style solder-down Computer-on-Modules — how to choose the right SoC variant, and how the shared pinout lets one carrier PCB accept multiple modules across the STM32MP, i.MX 9, i.MX 8M and Renesas RZ ranges.
13 modules compared
2 footprints: 27 mm / 29 mm
1 mm-pitch QFN, thermal pad
Drop-in design rules
Published by Strategic Embedded  ·  QS modules manufactured by Ka-Ro electronics GmbH. Specifications compiled from manufacturer datasheets; for design-in always confirm against the current datasheet of the specific ordering variant.  ·  Rev. 2026-06
The QS Compatibility Concept
QS Series Guide

One pinout, two footprints

Every QS module is a QFN-style solder-down COM on a 1 mm pad pitch with a large central ground/thermal pad. The whole family shares a single QS Standard Pinout — SPI, I²C, CAN, Ethernet, SD, USB, UART and the display interfaces always land on the same pad numbers, regardless of whether the silicon underneath is ST, NXP or Renesas. That is what makes a carrier board re-usable across SoC generations and vendors.

QS  →  27 mm · 100 pads

The base footprint. 100 pads around a 27 mm square body, ~2.3–2.6 mm tall. Carries everything except PCIe / USB 3.0 Super-Speed.

GND

QSX  →  29 mm · 108 pads

The QS body enlarged by 1 mm all around (27 → 29 mm). The inner 27 mm area is identical; the 4 corners add 8 pads for PCIe and USB 3.0.

GND
Shared 27 mm / 100-pad core (identical across the family) 8 extra QSX corner pads — PCIe & USB 3.0
Forward compatibility: a carrier laid out for the 29 mm QSX footprint will also accept any 27 mm QS module — the inner pads match; you simply leave the 8 corner pads unconnected (forgoing PCIe/USB 3.0). A 27 mm-only carrier cannot take a 29 mm module. Design to 29 mm for maximum future flexibility.
Position vs. function: the pad positions are standardised, but not every module exposes every interface (CAN, display type, PCIe/USB3 vary). For a true drop-in design, restrict the layout to the signals common to the specific modules you intend to support — see the design rules on the final page.
Module Comparison
Group A · 27 mm · 100-pad

Group A — 27 mm square, 100-pad QFN

The QS Standard Pinout. All modules below share one pad map and are mutually footprint-compatible (subject to the per-pad function notes). Listed lightest-to-heaviest in compute.

Module SoC CPU cores RAM eMMC GPU / NPU Key connectivity Temp °C Pin‑cpt
QSMP STM32MP1 (family) 1–2× A7 @650 256/512 MB DDR3L 4 GB* — USB2, GbE, CAN, RGB/DSI -40/-25→85 —
QSMP-13 STM32MP135C 1× A7 @650 256 MB DDR3L 4 GB — USB2, GbE, 2× CAN-FD, 24-bit RGB -25→85 —
QSMP-15 STM32MP157 2× A7 @650 + M4 256/512 MB DDR3L 4 GB Vivante (opt) USB2, GbE, CAN, RGB/DSI, WiFi/BT opt -40/-25→85 —
QSMP-20 STM32MP235C 2× A35 @1.2 + M33 512 MB DDR3L 4 GB 3D · 0.6 TOPS 2× USB2, GbE, 2× CAN-FD, RGB/DSI -25→85 ✓
QSMP-23 STM32MP235 2× A35 @1.2 + M33 1 GB LPDDR4 4 GB 3D · 0.6 TOPS 2× USB2, 2× GbE, 2× CAN-FD, LVDS -40→85 ✓
QS8M i.MX 8M Mini / Nano 4× / 2× A53 @1.4–1.6 0.5/1 GB DDR3L 4 GB GCNanoUltra 3D 1–2× USB2, GbE, MIPI-CSI/DSI -25→85 —
QS91 i.MX 91 1× A55 @1.4 512 MB LPDDR4 4 GB — 2× USB2, 2× GbE/TSN, 2× CAN-FD, RGB -25→85 ✓
QS93 i.MX 93 2× A55 @1.5 + M33 1 GB LPDDR4 4 GB 2D · Ethos-U65 2× USB2, 2× GbE/TSN, 2× CAN-FD, LVDS -40→85 ✓
QSRZ Renesas RZ/G2L 2× A55 @1.2 + M33 0.5/1 GB DDR3L 4 GB Mali-G31 3D USB2, 2× GbE, 2× CAN, RGB/DSI -40→85 —
Reading the “Pin-cpt” column: ✓ = the datasheet explicitly prints a “QS (family) pin-compatible” claim. A “—” module still uses the standard 27 mm / 100-pad footprint, but Ka-Ro did not print the compatibility statement — verify its exact pad map before committing a shared layout.   *QSMP base offers 4 GB eMMC or 128 MB SLC NAND.
Module Comparison
Group B · 29 mm · 108-pad

Group B — 29 mm square, 108-pad QFN (QSX)

The extended footprint. Inner 27 mm pads are identical to Group A; the 8 corner pads add PCIe and/or USB 3.0 Super-Speed. These are the high-bandwidth / high-AI members of the family.

Module SoC CPU cores RAM eMMC GPU / NPU Key connectivity (incl. corner pads) Temp °C Pin‑cpt
QSXM i.MX 8M Mini 4× A53 @1.6 + M4 2 GB LPDDR4 4 GB GCNanoUltra 2× USB2, PCIe Gen2 ×1, GbE, CSI/DSI -25→85 ✓
QSXP i.MX 8M Plus 4× A53 @1.6 + M7 + HiFi4 2 GB LPDDR4 8 GB GC7000UL · 2.3 TOPS USB3+USB2, PCIe Gen3 ×1, GbE/TSN, 2× CAN-FD, 2× CSI -30→85 ✓
QSMP-25 STM32MP255 2× A35 @1.5 + M33 1 GB LPDDR4 4 GB 3D · 1.2 TOPS 2× USB2 + USB3 or PCIe, 2× GbE/TSN, 3× CAN-FD, LVDS -40→85 ✓
QS95 i.MX 95 6× A55 @1.8 + M7 + M33 2 GB LPDDR5/4X 4 GB Mali-G310 · 2 TOPS USB2 (no USB3), 1× PCIe Gen3, 1× GbE/TSN, 2× CAN-FD -25→85 5 V*
*QS95 power rail: the QS95 is a 5 V-supplied module, whereas all other QS modules run from 3.3 V (some QS modules also accept 5 V). Footprint compatibility does not imply rail compatibility — check your carrier’s module supply before planning a swap into/out of QS95.

Performance ladder at a glance

Tier Best-fit modules Typical use
Entry / cost QSMP-13, QSMP-15, QSMP, QS91 HMI panels, gateways, simple RGB/Linux UIs, headless control
Mid / efficient AI QSMP-20, QSMP-23, QS93, QSRZ, QS8M Edge control with light ML (≤0.6 TOPS), dual-display, CAN-FD nodes
High / vision + PCIe QSXM, QSXP, QSMP-25 Multi-camera vision, 2.3 TOPS AI, PCIe/USB3 peripherals, networking
Top / heterogeneous QS95 6× A55, 4K60 codec, 2 TOPS, GbE + 1× PCIe, demanding multimedia
Inter-Module Pin Compatibility
QS Standard Pinout — full family matrix

Which interface lands on which pins — across every QS module

The QS Standard fixes each interface to a defined pad range, so the same carrier can host different modules. The common core (green) is present on the same pins family-wide — build your base design on it for guaranteed swappability. The variant-specific rows are where compatibility actually diverges: confirm these for every module you intend to support.

Interface (standard QS pins) 27 mm · 100-pad QFN — Group A 29 mm · 108-pad — Group B (QSX)
QSMP QSMP
‑13		 QSMP
‑15		 QSMP
‑20		 QSMP
‑23		 QS8M QS91 QS93 QSRZ QSXM QSXP QSMP
‑25		 QS95f
Common core — present on the same standard pins family-wide (safe subset for a universal carrier)
SPI ×2pins 1-4 / 97-100 ● ● ● ● ▲e ● ● ● ● ● ● ● ▲
I²Cpins 5-10 ● ● ● ● ● ● ● ● ● ● ● ● ▲
Ethernet (Gb)pins 19-35 ● ● ● ● ●b ● ●b ●b ● ● ● ●b ●
SD / eMMCpins 36-39 ● ● ● ● ● ● ● ● ● ● ● ● ▲
USB 2.0pins 43-48 ● ● ● ● ● ● ● ● ● ● ● ● ●
Power / Reset / Bootpins 49-52 ● ● ● ● ● ● ● ● ● ● ● ● ●
UARTpins 89-96 ● ● ● ● ● ● ● ● ● ● ● ● ●
Variant-specific interfaces — confirm per module before committing a layout
CAN-FDpins 11-14 ● ● ● ● ● ·a ● ● ● ·a ● ● ▲
Parallel RGB displaypins 53-76 ● ● ● ● · · ● ● ● · · · ·
LVDS displayshares 53-88 · · · · ● · · ● · · · ● ·
MIPI-DSI displaypins 79-88 ● ·c ● ● ● ● ·c ● ● ● ● ● ▲
MIPI-CSI camerapins 53-72 · · · · ● ● ▲d ● ▲d ● ●d ● ▲
PCIecorner pads ·A · · · · · · · · · ● ● ● ▲f
USB 3.0 Super-Speedcorner pads ·A · · · · · · · · · · ● ● ·
● available on the standard pins ▲ available — see note · not available
a — On i.MX 8M (QS8M, QSXM) the standard CAN pads 11-14 carry S/PDIF / SAI audio; no CAN bus is exposed.
b — Dual (2×) Gb Ethernet / TSN on QSMP-23, QS91, QS93 and QSMP-25; single port on the others.
c — QSMP-13 and QS91 have no MIPI-DSI — parallel RGB only.
d — QSXP brings out dual (2×) MIPI-CSI; QS91 offers an 8-bit parallel camera port instead of MIPI-CSI; QSRZ lists camera as a SoC capability but it is not on a dedicated QS pad.
e — QSMP-23 exposes a single SPI (most modules expose two).
f — QS95 (i.MX 95) — confirmed by Ka-Ro (06/2026): a 108-pad QSX part, but its pin assignment diverges from the QS Standard, so most interfaces are ▲ present on non-standard pins: SPI#1 on 26-29 (SPI#2 standard on 97-100), I²C on 30-35, CAN-FD on 21-24, SD/eMMC on 81-88, MIPI-DSI on 11-20, MIPI-CSI on 1-10; PCIe uses a non-standard layout (1× Gen3). UART, USB 2.0, Ethernet (1× GbE) and power/reset/boot are on standard pins. LVDS and USB 3.0 are not available. QS95 is 5 V-supplied (other QS run 3.3 V). A QS95 design needs a QS95-specific carrier — do not assume a drop-in swap with standard QS modules.
g — Compiled from datasheet feature lists and the QS Standard pinout; QS95 column verified with Ka-Ro engineering. Always confirm against the current datasheet of the specific ordering variant before layout.
Power Consumption
Measured across the QS family

Power consumption — measured, not adjectival

Ka-Ro's own bench measurements, taken from a bare module with no peripherals attached, in three states: at the U-Boot prompt (cold-boot idle, before the OS starts), at the Linux prompt (kernel booted, no user workload), and Sleep (suspend-to-RAM / low-power state, wake sources active). All values in milliwatts at 3.3 V input unless noted. Add your own peripheral, display, radio and CPU-load budget on top.

Module U-Boot idle [mW] Linux idle [mW] Sleep [mW] Notes
Group A · 27 mm · 3.3 V
QSMP-13 STM32MP135 620 520 15 Entry — lowest Sleep in the family.
QSMP-15 STM32MP157 620 520 15 Dual-A7 · Sleep tied with QSMP-13.
QSMP-2030 STM32MP235 · 512 MB Ka-Ro measurement pending — module ships from Ka-Ro Q3 2026 Expect near QSMP-2350.
QSMP-2350 STM32MP235 · 1 GB 630 550 96 AI-class STM32MP2 at <1 W idle.
QS8M i.MX 8M Nano / Mini 670 / 840 500 / 510 45 / 60 Nano / Mini variant, respectively.
QS91 i.MX 91 660 415 35 Lowest Linux idle in the A-class NXP set.
QS93 i.MX 93 880 490 55 Dual-A55 + 0.5 TOPS Ethos-U65 NPU.
QSRZ Renesas RZ/G2L 782 657 500 Sleep is workload-dependent1.
Group B · 29 mm QSX · 3.3 V (QS95 is 5 V)
QSXM i.MX 8M Mini · 2 GB 1161 739 40 Fanless single-shader 3D GPU.
QSXP i.MX 8M Plus 1520 1230 86 NPU + PCIe + GbE + USB 3.0.
QSMP-2550 STM32MP255 800 800 80 1.35 TOPS AI on 29 mm.
QS95 i.MX 95 · 5 V Ka-Ro measurement pending — samples Q3 2026 5 V-supplied — figures will be quoted at that rail.
mW at 3.3 V VIN unless noted Bare module; no display, radio or peripheral load Add carrier + payload budget on top
1 — QSRZ "Sleep" per Ka-Ro's published measurement reflects the RZ/G2L default low-power state; the RZ/G2L supports deeper suspend modes that depend on which wakeup sources are enabled — see the Renesas mainline BSP notes.
Source: Ka-Ro electronics — www.karo-electronics.com/product-selection (Power consumption tab, Aug 2026 snapshot). Values are Ka-Ro bench measurements on evaluation carriers with all pins unconnected. Your carrier, peripheral and OS configuration will change the numbers; treat these as a comparative baseline, not a design margin.
Design-in Guidance
Cross-QS Compatibility Rules

Designing a future-proof QS carrier

Five rules to lay out one PCB that can host several QS modules across the product lifetime.

1 Lay out to the 29 mm QSX footprint

The 108-pad outline is a superset of the 100-pad outline. A 29 mm land pattern accepts both QSX and QS modules; a 27 mm pattern locks out every 108-pad part. Route the 8 corner pads, then simply depopulate them when a 27 mm module is fitted.

2 Build to the common-signal subset

Use only interfaces present on every module you want to support. SPI, I²C, the SD interface, USB2, UART, power/reset/boot and the central ground are common to the whole family. Treat CAN, the display type (parallel RGB vs LVDS vs MIPI-DSI), camera lanes and PCIe/USB3 as variant-specific.

3 Pick one display strategy early

Display routing is the most common compatibility break: QSMP-13/15 and i.MX 91 favour 24-bit parallel RGB, while QSMP-23/25 and QS93 expose LVDS, and the i.MX 8M parts use MIPI-DSI. If you need a single panel interface across modules, confirm it is mapped on each candidate before layout.

4 Verify the supply rail & thermals

Nearly all QS modules run from 3.3 V; QS95 is the exception at 5 V (some modules accept either). Provision the carrier for the highest-power module in your roadmap and rely on the central thermal pad for heat-spreading to a copper plane or heatsink.

5 Confirm against the per-variant datasheet

This guide standardises marketing-level specs. Before release, cross-check the exact pin/alternate-function table of each ordering variant — pad positions are fixed by the QS standard, but the multiplexed function on a given pad can differ between SoCs.

Quick selector

Need PCIe or USB 3.0?
Yes → QSX class (QSXM, QSXP, QSMP-25, QS95). No → any 27 mm QS module.
Need on-module AI / NPU?
≤0.6 TOPS → QSMP-20/23, QS93. 1–2.3 TOPS → QSMP-25, QSXP, QS95.
Vendor / ecosystem preference?
ST → QSMP-xx · NXP i.MX → QS8M/91/93/95, QSXM/XP · Renesas → QSRZ.
Industrial -40 °C needed?
Choose QSMP-23, QSMP-25, QS93, QSRZ (rated to −40 °C).
Lowest cost / simplest?
QSMP-13 / QSMP-15 / QS91 — single/dual-core, RGB display, no NPU.
In short: design the carrier once to the 29 mm, common-signal rules above and you can move up and down the QS ladder — and even switch silicon vendor — without re-spinning the PCB.